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ASIC and SoC design

Barco Silex offers to its customers ASIC and complex SoC design services and technologies. Barco Silex transforms customers multi-million gates design idea into a logic netlist, including multi-cores IP, to the final packaged test chips. Customers can consistently achieve time-to-design and time-to-market efficiency for mass production with its preferred manufacturer or Barco Silex usual partner.

Barco Silex success with ASIC and SoC design is based on:

  • High level experience of IP design, testing, and validation
  • A long term manufacturing relationship with multiple vendors  
  • Prototyping of ASIC designs on FPGAs before committing to ASIC. The collaboration with the client starts at the system architecture level in defining FPGA prototype functionality, clock speeds, data rates, etc. which can be realistically achieved

Barco Silex works out complete Digital design services for:

  • Entire development from specifications to tested ASIC prototypes
  • VHDL and Verilog design and validation
  • Implementation and integration of IP blocks and complex functions
  • System-on-Chip (SoC) design with abilities for emulation
  • Access to our high-performance and silicon-proven IP cores
  • Design For Testability (DFT) including testability analysis, test synthesis and test vector generation
  • Transfer of any FPGA design or VHDL code to low cost ASIC solutions
  • All design back-end operations and layout-foundry interface with our preferred manufacturer FARADAY

ASIC technology and tool support

  • From 0.5um to 45nm
  • Standard Cell, Gate Array or mixed solutions
  • Standard, low-leakage or high-speed libraries
  • Tooling of Synopsys, Mentor, Cadence and others      

Ways of cooperation

Flexible services are offered to complement your own skills. As a complete set of specification is the first step to a successful design, we can assist you in setting up your architecture and specification set.

Technical consulting

Consultancy is offered to analyse your technical problem and define if the use of ASICs can improve your product. 

Pre-study and cost calculation

Defining the cost of a design and calculation of the profitability is a complex task. Barco Silex helps you with your pre-study. We calculate for you the cost of the Asic and define with you the needed IP blocks, RAMs, Flash, performances, power consumption, etc...

Manufacturing Partnership

Preferred ASIC partners are: ARM, FARADAY and others upon customer requirements.

Analog and mixed signal design partnership

Barco Silex has close partnerships with analog design houses for your mixed signal ASIC designs.

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