BA612A - AHB Multi-Channel DMA controller

Description

The BA612A is a configurable Multi-Channel AHB-lite DMA Controller. This core is a tiny solution which is able however to perform high-throughput DMA transfers.
BA612A - AHB Multi-Channel DMA Controller

General Description

The BA612A supports the following transfer types and transfer modes:



Transfer types

  • memory to memory
  • peripheral to memory
  • memory to peripheral

Transfer modes

  • Basic
  • Auto-Request
  • Ping-Pong

DMA Block transfers are automatically splitted into several DMA Burst transfers. The Burst Length (BL) is programmable separately for each channel.

Any DMA Burst transfer is executed as follows:

  • The DMA Controller downloads channel parameters from the system memory if needed (when executing alternate Burst Transfers on different channels or starting a new Block transfer)
  • One burst of data is transfered from the source into the internal FIFO
  • Data stored in the internal FIFO are transfered to the destination
  • Arbitration is done after each Burst transfer

An interrupt is generated when the entire DMA Block transfer  is terminated. If needed, the length of the last burst is adapted.

Resources

  • Typical configuration with 8 channels: 250MHz – 10kgates in ASIC TSMC 90nm
Reference: 
BA612A

Features

  • AMBA AHB-lite compliant DMA transfers
  • Supports multiple transfer types: memory to memory, peripheral to memory, memory to peripheral
  • Number of DMA channels configurable
  • Supports Basic, Auto-request & Ping-Pong Transfer Modes
  • Low gate count solution with channel parameters stored in system memory:
    • Programmable burst length for each channel
    • Programmable transfer width for each channel
    • Programmable transfer type for each channel
    • Programmable transfer mode for each channel
    • Programmable transfer size for each channel
    • Source & Destination addresses
  • All other parameters programmable through APB Interface
  • Fixed priority or round-robin scheme
  • Best trade-off performance/area by defining generic parameters before synthesis