BA411E - AES crypto engine
Description
Tiny or high-speed AES Crypto Engine supporting a wide range of cipher modes like ECB, CBC, CFB, OMAC and XTS and interleaved CTR, CCM and GCM on ASIC and FPGA
The BA411E is a Multi-Purpose AES Crypto Engine developed, validated and licensed by BARCO-Silex.
Scalable AES core
The BA411E includes a generic (ASIC, Actel, Altera, Xilinx) and scalable implementation of the AES algorithm, making the solution suitable for a wide range of low-end and high-end applications.
Flexible wrapper & suitable interfaces
With a very flexible wrapper supporting a wide selection of programmable ciphering modes (ECB, CTR, CBC, CFB, OFB, OMAC, CCM, GCM and XTS) and several options of data interface (FIFO, DMA, AXI4-Stream,…), the BA411E is an easy-to-use solution with predictable resources and performances on ASIC and FPGA.
Optional capabilities
- Interleaved ECB, CTR, CCM and GCM modes for ultra-high performances
- Masking option available for applications requiring higher level of security (protection against SPA and DPA)
- ‘Bypass’ or ‘NULL Cipher’ mode for streaming applications
- Stallable core
- AXI4-Stream or FIFO Interface
Resources and Performances
- Data Sheet is available under NDA
- Tiny Configuration: less than 10k gates
- Hi-speed Configuration: Up to 40 Gbps
- Performances and complexity are available on request for any FPGA device
Reference:
BA411E Features
- High-level of scalability: 4, 8 or 20 S-Boxes
- Supports interleaved ECB, CTR, CCM and GCM modes for higher performances
- Portability: ASIC, Actel, Altera, Xilinx
- Supports 128-bit, 192-bit and 256-bit key length
- Supports Encryption and Decryption
- Performs Key Expansion
- Supports a wide selection of programmable ciphering modes:
- Non-Chaining Modes (SP800-38A): ECB and CTR
- Chaining Modes (SP800-38A): CBC, CFB and OFB
- Chaining Modes (SP800-38B): OMAC
- Encryption + Auth. (SP800-38C): CCM
- Encryption + Auth. (IEEE 802.1ae): GCM
- Supports ‘Bypass’ or ‘NULL Cipher’ mode for streaming applications
- Stallable core in FIFO mode
- Control I/F: APB or AXI4-Lite compliant CPU
- Data I/F: Slave, FIFO/AXI4-Stream (Streaming) or DMA
- Off-the-shelf, predictable and silicon-proven solution
- Masking option available for applications requiring higher level of security - protection against SPA and DPA (Simple/Dual Power Analysis)
- Self-checking TestBench based on FIPS vectors
