BA414E - Public Key crypto engine
Public Key cryptography is part of many security standards and is widely used to establish secure communication channels across unsecure open networks like Internet or to provide authentication via electronic signatures.
Software solutions are often too slow for real-time applications and the
overall impact on performances becomes very quickly a penalty for the whole system when the overhead on CPU workload is too high. Accelerators often consume a large part of silicon and are not flexible enough to be used as stand-alone solutions.
The BA414E is an efficient hardware accelerator really offering significant and valuable advantages.
Small footprint and high-performance solutions
The BA414E is highly pipe-lined and can provide very high-performances in large configurations. With less than 30kgates for the smallest configuration supporting the whole set of operations, the BA414E is the ideal solution for applications requiring strong constraints of cost and power.
100% CPU offload
The BA414E does not require any assistance of the main CPU. Pre- and post-calculations are automatically done and all internal data transfers are handled by a scatter-gather DMA.
The Core is available on any ASIC technology or any FPGA device from Actel, Altera or Xilinx.
- High-level of scalability with solutions implementing 4, 16, 64 or 256 multipliers
- Highly pipe-lined solution
- Portability: ASIC, Actel, Altera, Xilinx
- Supports all arithmetic operations in both fields F(p) and F(2m)
- Modular Addition/Subtraction/Multiplication/Division/Inversion
- Supports arbitrary data/key sizes up to 4096 bits
- Point Doubling/Addition/Multiplication for ECC-F(p) and F(2m)
- NIST recommended Curves are supported:
- Prime Field: P-192, -224, -256, -384, -521
- Binary Field: K/B-163, -233, -283, -409, -571
- Supports a lot of standard PK algorithms: Modular Exponentiation, RSA and CRT, Elliptic Curve Cryptography (ECC), Digital Signature Algorithm (DSA) and Elliptic Curve DSA (ECDSA), Primality Test (Rabin-Miller) for Key Generation
- 100% CPU Offload: Pre- and post-processing automatically executed (no need of external SW resources)
- Control Interface: APB-compliant CPU Interface
- Data interface: Generic Memory Interface controlled by an internal scatter-gather DMA
- Off-the-shelf and silicon-proven solution
- Optional add-on for protection against SPA/DPA
- Netlist or RTL, Scripts for synthesis
- Self-checking TestBench based on FIPS vectors